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Augmented Silicon Photonics
While the speed of high-speed interfaces (SerDes, PCIe, UCIe, DDR, HBM,...) doubles every two years, the size of AI models increases at a much faster rate, doubling every 4 months. There is a need for parallelism to close this performance gap and continue to scale the computing and memory resources while addressing latency, density, energy efficiency and cost.
Our ability to integrate laser arrays with silicon photonics is ideal for channel multiplexing in pluggable or co-package optics for even denser and lower power implementation.
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