AI Performance Now Depends on Optics, and CPO Is the Front Line

Over the past few months, our CEO, Matt Crowley, has made one argument across the industry press: the optical interconnect, not the processor, now decides how far an AI system can scale. EE Times, Laser Focus World, and PIC Magazine each ran a piece of it. Over the next four weeks, we are putting the throughline in one place, one argument at a time, ending at the question that now decides scale-up: not which spec you pick, but whether your light source can keep adding wavelengths on the same manufacturing flow, or whether it caps out and forces a redesign. This is where it starts.

The next advantage in AI infrastructure will not be decided by a faster chip. It will be decided by the network.

For a decade, the win went to whoever squeezed more out of a single processor. That era is closed as Moore’s law is dead and every advanced AI processor has access to the same underlying CMOS technology. As AI factories scale to hundreds of thousands of GPUs and clusters tie thousands of accelerators into a single coherent system, the processor is no longer the bottleneck. The fabric that connects them is. The network has become the control point for system performance, and the teams that treat it that way will own the next performance curve.

Copper made the point for us. Network engineers have pulled every usable meter and every bit of bandwidth out of copper interconnects, but physics sets the ceiling. As signaling frequencies climb, reach collapses. At AI-factory scale, copper runs into reach, density, and power limits that are expensive to engineer around and impossible to engineer past. Adding more fiber is not the answer either. Very high fiber counts per connection are fragile and costly. Bandwidth has to come from more channels per fiber, not more fibers.

That shift rewrites the metrics. Energy per bit (often measured in picojoules per bit), latency, bandwidth density, and reach are now board-level numbers, not engineering footnotes. Tail latency belongs on that list, too. In a tightly coupled GPU cluster, a single delayed bit can idle thousands of processors, and utilization is where AI datacenter economics live or die.

Co-packaged optics (CPO) is where these constraints point. Moving optics to the package boundary shortens the electrical path, cuts power, and raises channel density right where the pressure is highest. NVIDIA's published roadmap toward sub-1 picojoule-per-bit interconnects aligns with this direction, modeling a dense wavelength-division multiplexing (DWDM) architecture as the path forward. When the market leader charts the route this clearly, waiting becomes the expensive option.

Getting there takes more than better optics. It takes integration that a foundry can actually build. Combining laser sources, modulators, and photodetectors in a single, foundry-aligned silicon photonics flow is what separates a lab demonstration from a technology that ships in volume. This is the problem our SHIP™ (Scintil Heterogeneous Integrated Photonics) technology was built to solve, with LEAF Light™, our DWDM-native integrated laser source, as the first commercial proof. Manufacturing alignment, not novelty, decides who scales.

The signal across the ecosystem is consistent. Optics are moving from the front panel into the system architecture, and the teams designing for that now are the ones attracting capital and partnerships.

Read Matt Crowley's full argument in EE Times. It maps the market moves already underway and lays out a practical playbook for designing toward DWDM CPO over the next 12 to 24 months: "AI Performance Now Depends on Optics (and CPO Is the Front Line).”

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Next week in the series, we look at why "copper where you can, optics when you must" has quietly become "optics now," and the physics that forces the change.